By Topic

Improved interface properties of Ge metal-oxide-semiconductor capacitor with TaTiO gate dielectric by using in situ TaON passivation interlayer

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Ji, F. ; Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, People’s Republic of China ; Xu, J.P. ; Liu, J.G. ; Li, C.X.
more authors

Your organization might have access to this article on the publisher's site. To check, click on this link: 

TaON is in situ formed as a passivating interlayer in Ge metal-oxide-semiconductor (MOS) capacitors with high-k TaTiO gate dielectric fabricated simply by alternate sputtering of Ta and Ti. Also, postdeposition annealing is performed in wet N2 to suppress the growth of unstable GeOx at the Ge surface. As a result, excellent electrical properties of the Ge MOS devices are demonstrated, such as high equivalent dielectric constant (22.1), low interface-state density (7.3×1011 cm-2eV), small gate leakage current (8.6×10-4 Acm-2 at Vg-Vfb=1 V), and high device reliability. Transmission electron microscopy and x-ray photoelectron spectroscopy support that all these should be attributed to the fact that the nitrogen barrier in the TaON interlayer can effectively block the interdiffusions of Ge and Ta, and the wet-N2 anneal can significantly suppress the growth of unstable low-k GeOx.

Published in:

Applied Physics Letters  (Volume:98 ,  Issue: 18 )