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Error correcting code analysis for cache memory high reliability and performance

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4 Author(s)
Rossi, D. ; DEIS, U. of Bologna, Bologna, Italy ; Timoncini, N. ; Spica, M. ; Metra, C.

In this paper we address the issue of improving ECC correction ability beyond that provided by the standard SEC/DED Hsiao code. We analyze the impact of the standard SEC/DED Hsiao ECC and for several double error correcting (DEC) codes on area overhead and cache memory access time for different codeword sizes and code-segment sizes, as well as their correction ability as a function of codeword/code-segment sizes. We show the different trade-offs that can be achieved in terms of impact on area overhead, performance and correction ability, thus giving insight to designers for the selection of the optimal ECC and codeword organization/code-segment size for a given application.

Published in:

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011

Date of Conference:

14-18 March 2011