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mRTS: Run-time system for reconfigurable processors with multi-grained instruction-set extensions

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4 Author(s)
Waheed Ahmed ; Karlsruhe Institute of Technology, Chair for Embedded Systems, Karlsruhe, Germany ; Muhammad Shafique ; Lars Bauer ; Jörg Henkel

We present a run-time system for a multi-grained reconfigurable processor in order to provide a dynamic trade-off between performance and available area budgets for both fine- as well as coarse-grained reconfigurable fabrics as part of one reconfigurable processor. Our run-time system is the first implementation of its kind that dynamically selects and steers a performance-maximizing multi-grained instruction set under run-time varying constraints. It achieves a performance improvement of more than 2× compared to state-of-the-art run-time systems for multi-grained architectures. To elaborate the benefits of our approach further, we also compare it with offline- and online-optimal instruction-set selection schemes.

Published in:

2011 Design, Automation & Test in Europe

Date of Conference:

14-18 March 2011