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Systematic design of a programmable low-noise CMOS neural interface for cell activity recording

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6 Author(s)

The increasing electrode density in multielectrode arrays and the use of new materials for electrode fabrication are motivating the migration from passive to active neuroprobes. Numerous circuit design challenges for the implementation of optimal integrated neural recording systems are still present and need to be addressed. In this paper we present the systematic design of a programmable low-noise multi-channel neural interface that can be used for the recording of neural activity in in vitro and in vivo experiments. The design methodology includes modeling and simulation of important parameters, allowing the definition, optimization and testing of the architecture and the circuit blocks. In the proposed architecture, individual channel programmability is provided in order to address different neural signals and electrode characteristics. A 16-channel fully-differential architecture is fabricated in a 0.35 μm CMOS technology, with a die size of 5.6 mm × 4.5 mm. Gains (40-75.6 dB) and band-pass filter cut-off frequencies (1-6000 Hz) can be digitally programmed using 7 bits per channel and a serial interface. The circuit consumes a maximum of 1.8 mA from a 3.3 V supply and the measured input-referred noise is between 2.3 and 2.9 μVrms for the different configurations. We successfully performed simultaneous recordings of action potential signals, using different electrode characteristics in in vitro experiments.

Published in:
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011

Date of Conference: 14-18 March 2011

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