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Physical properties of nanotechnological elements and application requirements demand reconsideration of fundamental information principles of a computer architecture. First of all, it is expedient to return to decimal notation of numbers, which was successfully used in mechanical computers. Besides, it is preferable to use serial data transfer and processing because the cost function and signal propagation delay of the computation nanoelements and communication nanoelements are comparable. Therefore, the basic unit of novel nanocomputer architecture is a serial decimal adder. This paper presents a serial decimal adder design in quantum-dot cellular automata (QCA) nanotechnology. The proposed QCA one-digit serial decimal adder is based on an original algorithm for addition of two operands encoded by the Johnson-Mobius code. The new adder design is compared with parallel and conventional designs as to its complexity, area, propagation delay, and cost function. The implementation details of the one-digit serial decimal Johnson-Mobius subtractor and adder/subtractor are also discussed.