Scheduled System Maintenance:
On May 6th, single article purchases and IEEE account management will be unavailable from 8:00 AM - 12:00 PM ET (12:00 - 16:00 UTC). We apologize for the inconvenience.
By Topic

Signal Competition Based Synthesis of Asynchronous High- Speed Digital Circuits

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Petrakieva, Simona ; Technical University of Sofia, Bulgaria ; Mladenov, Valeri

In this paper, we present a method for synthesis of asynchronous high-speed digital circuits. The synthesis problem consists of determining the delay of all asynchronous gates of the circuit, such that to avoid the signal competition. The method is based on determining all possible pairs of paths between every pair of gates in the circuit. Then the conditions for eliminating the signal competitions are transformed into a linear programming problem. The solution of this problem gives the desired delays of the asynchronous gates.

Published in:

Theoretical Engineering (ISTET), 2009 XV International Symposium on

Date of Conference:

22-24 June 2009