By Topic

Logical circuit gate sizing using MPSO guided by Logical Effort - An examination of the 8-stage full adder circuit

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Johari, A. ; Fac. of Electr. Eng., Univ. Teknol. Mara, Shah Alam, Malaysia ; Mohamed, S. ; Halim, A.K. ; Yassin, I.M.
more authors

Automated Complementary Metal Oxide Semiconductor (CMOS) logic circuit design leads to the reduction in costs associated with manpower and manufacturing time. Conventional methods use repetitive manual testing guided by Logical Effort (LE). Our previous works have shown the applicability of the Particle Swarm Optimization (PSO) algorithm guided by LE in searching for optimal gate widths for CMOS design. In this paper, we present a PSO variant called Mutative Particle Swarm Optimization (MPSO) to automate the sizing process of CMOS circuit design on an 8-stage full adder circuit. In our work, we choose gate widths inside the circuit as parameters to be optimized in order to achieve the target delay, with the solution fitness guided by the LE method. Various parameters, such as swarm size and iterations were tested under different initialization conditions to verify MPSO's performance on a 8-stage full-adder circuit. Results have indicated that the MPSO algorithm was an effective method to apply to the circuit design problem, with high convergence rates observed.

Published in:

Signal Processing and its Applications (CSPA), 2011 IEEE 7th International Colloquium on

Date of Conference:

4-6 March 2011