By Topic

Explanation of the Charge-Trapping Properties of Silicon Nitride Storage Layers for NVM Devices Part I: Experimental Evidences From Physical and Electrical Characterizations

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

7 Author(s)
Elisa Vianello ; Department of Electrical, Management and Mechanical Engineering, University of Udine , Udine, Italy ; Francesco Driussi ; L. Perniola ; Gabriel Molas
more authors

In part I of this paper, we study the physicochemical structure and the electrical properties of low-pressure-chemical-vapor-deposited silicon nitride (SiN) aimed to serve as storage layers for nonvolatile memory applications. An in-depth material analysis has been carried out together with a comprehensive electrical characterization on two samples fabricated with recipes yielding rather standard SiN and Si-rich SiN. The investigation points out the impact of SiN stoichiometry and hydrogen content on the electrical characteristics of gate stacks designed in view of channel hot-electron/hole-injection program/erase (P/E) operation and tunnel P/E operation. The extensive and detailed characterization establishes a sound experimental basis for the development of the physics-based trap models proposed in the companion paper.

Published in:

IEEE Transactions on Electron Devices  (Volume:58 ,  Issue: 8 )