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This paper presents a prototype of a high-throughput 4 × 4 64-QAM MIMO receiver consisting of a channel matrix QR decomposition, a soft-output K-Best MIMO detector and a Convolutional Turbo Code decoder. The proposed MIMO receiver provides low processing latency and a pipelined architecture scalable to a larger number of antennas and constellation order. Therefore, it is suitable for LTE-Advanced and IEEE 802.16 m broadband wireless standards. A rapid prototyping platform interfacing MATLAB with Xilinx ISE was used in the development of the 4 × 4 64-QAM MIMO receiver. The receiver utilizes 96% of the slice LUTs and 78% of slice registers on Virtex-5 FX130T FPGA, operating at a maximum frequency of 125 MHz.