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Novel Readout Circuit Architecture for CMOS Image Sensors Minimizing RTS Noise

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2 Author(s)
Martin-Gonthier, P. ; Integrated Image Sensor Lab., Univ. of Toulouse, Toulouse, France ; Magnan, P.

This letter presents a novel readout architecture and its associated readout sequence for complementary metal-oxide-semiconductor (CMOS) image sensors (CISs) based on switch biasing techniques in order to reduce noisy pixel numbers induced by in-pixel source-follower transistor random telegraph signal noise. Measurement results done on a test image sensor designed with 0.35-μm CIS technology demonstrate an efficient reduction of noisy pixel numbers without a pixel performance decrease.

Published in:

Electron Device Letters, IEEE  (Volume:32 ,  Issue: 6 )