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A Fully-Integrated 16-Element Phased-Array Receiver in SiGe BiCMOS for 60-GHz Communications

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10 Author(s)
Natarajan, A. ; IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA ; Reynolds, S.K. ; Ming-Da Tsai ; Nicolson, S.T.
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A fully-integrated 16-element 60-GHz phased-array receiver is implemented in IBM 0.12-μm SiGe BiCMOS technology. The receiver employs RF-path phase-shifting and is designed for multi-Gb/s non-line of sight links in the 60-GHz ISM band (IEEE 802.15.3c and 802.11ad). Each RF front-end includes variable-gain LNAs and phase shifters with each front-end capable of 360° variable phase shift (11.25° phase resolution) from 57 GHz to 66 GHz with coarse/fine gain steps. A detailed analysis of the noise trade-offs in the receiver array design is presented to motivate architectural choices. The hybrid active and passive signal-combining network in the receiver uses a differential cross-coupled Gysel power combiner that reduces combiner loss and area. Each array front-end has 6.8-dB noise figure (at 22°C ) and the array has -10 dB to 58 dB programmable gain from single-input to output. Sixteen 60-GHz aperture-coupled patch-antennas and the RX IC are packaged together in multi-layer organic and LTCC packages. The packaged RX IC is capable of operating in all four IEEE 802.15.3c channels (58.32 to 64.8 GHz). Beam-forming and beam-steering measurements show good performance with 50-ns beam switching time. 5.3-Gb/s OFDM 16-QAM and 4.5 Gb/s SC 16-QAM links are demonstrated using the packaged RX ICs. Both line-of-sight links (~7.8 m spacing) and non-line-of-sight links using reflections (~9 m total path length) have been demonstrated with better than -18 dB EVM. The 16-element receiver consumes 1.8 W and occupies 37.7 mm2 of die area.

Published in:

Solid-State Circuits, IEEE Journal of  (Volume:46 ,  Issue: 5 )

Date of Publication:

May 2011

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