By Topic

Verification of dynamically reconfigurable embedded systems by model transformation rules

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Felix Madlener ; Integrated Circuits and Systems Lab, Technische Universität Darmstadt, Germany ; Julia Weingart ; Sorin A. Huss

This paper describes a methodology for the verification of reconfigurable embedded systems. The reconfigurable systems are described by means of the Reconfigurable Discrete Event Specified System (RecDEVS) computational model and the verification is performed by a model transformation from the RecDEVS model into an equivalent representation for the UPPAAL model checking methodology. We introduce an algorithm for the automatic transformation of such models, which originate from disjoint application domains. This allows the usage of an state-of-the art verification tool for the verification of arbitrary properties of system specifications denoted in RecDEVS. We also present a set of important system properties, which now may be verified. This set includes some fundamental reconfiguration domain specific properties, which were not addressed by previous formal verification methods. The feasibility of this approach is demonstrated for a complex automotive application.

Published in:

Hardware/Software Codesign and System Synthesis (CODES+ISSS), 2010 IEEE/ACM/IFIP International Conference on

Date of Conference:

24-29 Oct. 2010