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HAsim: FPGA-based high-detail multicore simulation using time-division multiplexing

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5 Author(s)
Michael Pellauer ; Computation Structures Group, Computer Science and A.I. Lab, Massachusetts Institute of Technology ; Michael Adler ; Michel Kinsy ; Angshuman Parashar
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In this paper we present the HAsim FPGA-accelerated simulator. HAsim is able to model a shared-memory multicore system including detailed core pipelines, cache hierarchy, and on-chip network, using a single FPGA. We describe the scaling techniques that make this possible, including novel uses of time-multiplexing in the core pipeline and on-chip network. We compare our time-multiplexed approach to a direct implementation, and present a case study that motivates why high-detail simulations should continue to play a role in the architectural exploration process.

Published in:

2011 IEEE 17th International Symposium on High Performance Computer Architecture

Date of Conference:

12-16 Feb. 2011