Skip to Main Content
This paper presents a dual-path PLL using a hybrid VCO to perform digital based frequency acquisition and analog based bandwidth control. With the mixed-mode dual-path control, the proposed PLL significantly alleviates noise coupling and area problems in the coarse-tuning path while minimizing open-loop gain variation in the fine-tuning path. In the hybrid VCO design, the nonlinearity issue of the capacitor array is addressed and a 1-bit quantizer (bi-level) Δ-Σ modulator is used to mitigate the problem. A 2 GHz PLL implemented in 0.18 μm CMOS exhibits less than +/- 3.5% bandwidth variation and less than 2 dB in-band noise variation over entire tuning range under nominal condition at room temperature. It also shows that more than 30 dB spur reduction is achieved with the bi-level second-order single-loop Δ-Σ modulator when the worst-case spur performance is compared with a second-order MASH modulator.
Circuits and Systems I: Regular Papers, IEEE Transactions on (Volume:58 , Issue: 9 )
Date of Publication: Sept. 2011