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A 1.6V 1.4Gb/s/pin consumer DRAM with self-dynamic voltage-scaling technique in 44nm CMOS technology

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9 Author(s)
Hyun-Woo Lee ; Hynix Semicond., Icheon, South Korea ; Ki-Han Kim ; Young-Kyoung Choi ; Ju-Hwan Shon
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This paper introduces the first ever dynamic voltage scaling (DVS) technique for DRAM considering both the process skew and the operating frequency which is adopted for the consumer DDR2 SDRAM. The self-dynamic voltage scaling (SDVS) itself is a very powerful technique to stretch the battery life and increase the reliability of DRAM.

Published in:

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2011 IEEE International

Date of Conference:

20-24 Feb. 2011