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Carrier based PWM scheme for a three-level diode-clamped five-phase voltage source inverter ensuring capacitor voltage balancing

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3 Author(s)
Sosthenes Karugaba ; Department of Electrical and Computer Engineering/Center for Energy Systems Research, Tennessee Technological University, Cookeville, TN 38505, USA ; Olorunfemi Ojo ; Meharegzi Abreham

A carrier-based modulation scheme for a three-level diode-clamped five-phase voltage source inverter is presented. This technique employs the generation of three average modulation signals for each inverter leg. These signals are compared with the same high frequency triangular carrier signal to produce the composite switching functions for each respective pair of the switching devices. It introduces natural balancing of the capacitor voltage and significantly reduces the harmonic content in both capacitor and output inverter voltages. The technique also ensures zero-neutral-point (NP) potential in the three-level voltage source inverter. Simulation results being compared to the phase disposition (PD) method as well as experimental results on a 10 kVA, three-level diode-clamped five-phase voltage source inverter are included in this paper to validate the presented approach.

Published in:

Applied Power Electronics Conference and Exposition (APEC), 2011 Twenty-Sixth Annual IEEE

Date of Conference:

6-11 March 2011