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This paper addresses the timely issues of modeling, and defining selection criteria for, a solid-state fault isolation device (FID) intended for use in power electronics-based distribution systems (PEDS). The paper subsequently derives the FID parameters in the PEDS envisioned under a new multi-university Engineering Research Center funded by the US National Science Foundation. When conventional circuit breakers are used in distribution systems, they have relatively long clearing times, causing feeder voltages to be reduced for a significant amount of time. Although acceptable in convention systems, this relatively long clearing time would cause significantly long, complete voltage collapses in a PEDS. Sensitive loads such as computers would fail even if the voltage returns within a few seconds. However, if a semiconductor circuit breaker were to be used instead of the conventional system, it would be able to switch fast enough to keep the time of voltage disturbances within acceptable limits. This paper discusses the management of the overvoltage resulting from very fast circuit breaker operation through the use of passive clamping devices and di/dt control during turn-off. The paper includes experimental results at medium voltage from a developed hardware prototype. In addition, a validated simulation model of a medium voltage FID was developed for future studies. Simulation results are presented.