Low power design of pre-computation based content-addressable memory

Content-addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due to its ability to improve application performance by using parallel comparison to reduce search time. Although the use of parallel comparison results in reduced search time, it also significantly increases power consumption. In this paper, we propose a Block-XOR and Block-XNOR approach to improve the efficiency of low power pre computation-based CAM (PB-CAM). In our experiment, we used Xilinx to estimate the power consumption in TSMC 0.35- m CMOS technology. Compared with the ones-count PB-CAM system, the experimental results show that our proposed approach can achieve on average 30% in power reduction.