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Two highly integrated ultra-low-power binary phase-shift keying (BPSK) receivers for short-range wireless communications are presented. The receivers consist of a power divider, two injection-locked RC oscillators with limiting buffers, and an xor output stage. The demodulation principle exploits the dynamic phase response of the two BPSK signal injected oscillators. As proofs of concept, a 300-MHz receiver/demodulator and an 868/915-MHz industrial-scientific-medical band receiver with digital tuning were implemented in 90-nm bulk CMOS technology. The 300-MHz RX/demod has an active die area of 0.04 mm2, RF input sensitivity of -34 dBm at 1 Mb/s, and consumes just 120 μW from a 1-V supply. The energy efficiency of 0.12 nJ/bit is among the best reported to date for low-power coherent demodulator. Based on the same architecture, the 868/915-MHz BPSK receiver prototype has an active die area of 0.04 mm2, an RF input sensitivity of -50 dBm at 2 Mb/s, and consumes only 216 μW from a 1.2-V supply (0.11 nJ/bit). Digital control of the injection-locked oscillator offset frequencies is implemented on-chip.