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Sensorless Self-Tuning Digital CPM Controller With Multiple Parameter Estimation and Thermal Stress Equalization

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4 Author(s)
Zdravko Lukić ; Laboratory for Power Management and Integrated Switch-Mode Power Supplies, Department of Electrical and Computer Engineering, University of Toronto, Toronto, Canada ; S. M. Ahsanuzzaman ; Zhenyu Zhao ; Aleksandar Prodić

This paper introduces a practical sensorless average current-programmed mode controller for low-power dc-dc converters operating at high switching frequencies. The controller accurately estimates inductor currents and identifies main converter parameters. Namely, total conduction losses in each of the phases as well as the inductors and output capacitance values are identified. The estimate of the losses is used to monitor temperature of the components without costly thermal sensors and for current sharing based on thermal stress equalization increasing system reliability. The identified filter values are utilized in a transient-mode controller for obtaining response with virtually minimum output voltage deviation. The key element of the new controller is a self-tuning digital multiparameter estimator that operates on the inductor time-constant matching principle. It estimates the average inductor current over one switching cycle using an adaptive IIR filter and, in the same process, identifies other converter parameters. The operation of the controller is verified with a single-phase 12 to 1.5 V, 15 W and a dual-phase 12 to 1.8 V, 80 W buck converter prototypes operating at 500 kHz switching frequency. The results show that the controller estimates the current and temperature of the components with better than 10% accuracy, effectively equalizes phase temperatures, and provides virtually minimum output voltage deviation during load transients. The implementation also shows that the controller is well suited for on-chip implementation. Its full realization requires less than 16 000 logic gates and two relatively simple ADCs that, in a standard 0.18-μm CMOS process, can be implemented on a small silicon area, no larger than 0.6 mm2.

Published in:

IEEE Transactions on Power Electronics  (Volume:26 ,  Issue: 12 )