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This paper presents a compact wideband equivalent circuit model for electrical modeling of through-silicon vias (TSVs) in 3-D stacked integrated circuits and packaging. Rigorous closed form formulas for the resistance and inductance of TSVs are de rived from the magneto-quasi-static theory with a Fourier-Bessel expansion approach, whereas analytical formulas from static solutions are used to compute the capacitance and conductance. The equivalent-circuit model can capture the important parasitic effects of TSVs, including the skin effect, proximity effect, lossy effect of silicon, and semiconductor effect. Therefore, it yields accurate results comparable to those with 3-D full-wave solvers.