By Topic

A novel high gain two stage ultra-wide band CMOS LNA in 0.18μm technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Kargaran, E. ; Dept. of Electr. Eng., Sadjad Inst. for Higher Educ., Mashhad, Iran ; Khosrowjerdi, H. ; Ghaffarzadegan, K. ; Kenarroodi, M.

In this paper, a novel high gain two stage Ultra wideband (UWB) Low Noise Amplifier (LNA) typology is proposed. The broadband matching and the flat gain are two important factors for the broadband circuits. Besides those factors, the minimal Noise Figure (NF), good linearity, and the lower power consumption are also desired. The common gate input stage configuration is used in the proposed LNA to achieve the broadband input matching. The flat gain of the LNA are achieved by the shunt inductor insertion between the cascade stages of LNA and series inductor insertion between two stage. A bias resistor of large value is placed between source and the body node to prevent body effect and reduce noise. The LNA is designed in the standard 0.18μm CMOS technology. The input and output reflection coefficient are less than -12.5dB and -8dB, respectively. It achieved maximum power gain 13.1dB, minimum noise figure is 3.35dB and maximum IIP3 is -7dBm. It consumes 10.7mW from a 1.8-V supply voltage.

Published in:

Circuits and Systems for Communications (ECCSC), 2010 5th European Conference on

Date of Conference:

23-25 Nov. 2010