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The impact of crosstalk noise on the resilience of on-chip communication links in the presence of parametric variations is investigated. A novel metric called crosstalk error rate is developed which can be a valuable tool for designers to predict the crosstalk effects and explore interconnect design techniques in order to achieve the target performance with minimum overheads. Closed-form expressions of crosstalk error rate are presented. This metric is used to compare different crosstalk avoidance methods in the 90 nm technology.