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ORION 2.0: A Power-Area Simulator for Interconnection Networks

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4 Author(s)
Kahng, A.B. ; Depts. of Comput. Sci. & Eng., Univ. of California at San Diego, La Jolla, CA, USA ; Bin Li ; Li-Shiuan Peh ; Samadi, K.

As industry moves towards multicore chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constraint, early-stage estimation of NoC power has become crucially important. In this work, we present ORION 2.0, an enhanced NoC power and area simulator, which offers significant accuracy improvement relative to its predecessor, ORION 1.0.

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Very Large Scale Integration (VLSI) Systems, IEEE Transactions on  (Volume:20 ,  Issue: 1 )