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In this paper, a negative body bias technique is employed to enhance the performance of a single-port double-throw (SPDT) traveling-wave switch. The switch is fabricated using a commercial standard bulk 90 nm CMOS process. Between 30 and 92 GHz, the proposed circuit demonstrates an insertion loss of lower than 3.7 dB, an isolation of higher than 35 dB, an output 1-dB compression point (P1dB) of higher than 17 dBm, and an input third-order intercept point (IIP3) of higher than 28 dBm. The core area of the switch is 0.3 × 0.2 mm2. With the body bias, the insertion loss and the linearity of the switch are both improved since the parasitic capacitance of the NMOS device is further reduced. The design concept and theory calculation are also presented.
Date of Conference: 7-10 Dec. 2010