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A 24-GHz low power low noise amplifier using current reuse and body forward bias techniques in 0.18-µm CMOS technology

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2 Author(s)
Che-Chung Kuo ; Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan ; Huei Wang

In this paper, a 24-GHz low noise amplifier (LNA) with low dc power in a standard 0.18 μm CMOS technology is presented. The body forward bias and current reuse techniques are adopted in the design to reduce the dc power. This LNA has 11.5-dB small signal gain and 5.7-dB noise figure, with 3-mW dc power. To the author's knowledge, this LNA has the lowest dc power among the reported LNAs around 24-GHz in 0.18 μm CMOS process.

Published in:

Microwave Conference Proceedings (APMC), 2010 Asia-Pacific

Date of Conference:

7-10 Dec. 2010