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CHARM: a synthesis tool for high-level chip-architecture planning

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1 Author(s)

A description is given of CHARM, a chip-architecture planning tool for digital VLSI. From a behavioral description on the algorithmic level, a structural strip-architecture plan is synthesized. It uses a knowledge-based approach that incorporates heuristics and experience from industrial designers into the system. This is done by modeling the various chip-architecture principles using generic objects called schemes, which are instantiated during the design process. Evaluation is done by heuristic quality functions to determine the best-suited architecture. A blackboard architecture is an adequate structure for the prototype expert system. The quality of this expert system heavily depends on the success of the knowledge acquisition from experienced VLSI designers. A simplified design example is given

Published in:

Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989

Date of Conference:

15-18 May 1989