Referenced Items are not available for this document.
The authors present an automatic layout system for designing large sea-of-gates gate arrays. This tool combines a floorplanning tool with an automatic placement and routing tool. It is designed to handle 250 K-gate arrays with special functional blocks such as RAM and ROM. It provides features for current processing, timing-driven layout, special clock distribution, and power distribution. The tool is currently being tested for designing the industry's most complex sea-of-gates gate arrays
Published in:
Custom Integrated Circuits Conference, 1989., Proceedings of the IEEE 1989
Date of Conference: 15-18 May 1989
- Page(s):
- 3.3/1 - 3.3/4
- INSPEC Accession Number:
- 3494832
- Conference Location :
- San Diego, CA, USA
- Digital Object Identifier :
- 10.1109/CICC.1989.56680
- Product Type:
- Conference Publications
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