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In this paper, we report a low-power voltage-controlled oscillator optimized for an operation around 100 GHz. The ultimate targets of this design are to maximize the oscillation frequency and minimize the power consumption of the oscillator. At the same time, the oscillator must provide a reasonable tuning range and an acceptable phase noise performance. To achieve these stringent requirements, the design procedure has been carefully considered. In addition, modifications from standard RF CMOS process are omitted to simplify the design process. The implemented oscillator uses transmission lines as the inductive element and inversion-mode MOSFET varactors as the tuning element. Integrated in a 65-nm CMOS process, the oscillator can operate with a supply voltage of as low as 0.7 V while exhibiting a tuning range between 105.48 to 106.88 GHz, a phase noise at the center of the tuning range of -89.2 dBc/Hz at 1-MHz offset (-105.9 dBc/Hz at 3-MHz offset) and consuming 2.59 mW (including output buffers).