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The SPWM control in a single FPGA has been developed and implemented. The SPWM IP core is designed using VHDL and a single FPGA, SPARTAN XC3S400PQ208 from Xilinx Inc. The simulations are carried out using Model Sim 5.7 and the implementation is carried out using Xilinx foundation series 9.1i. The PWM patterns have been achieved for different switching and fundamental frequencies. The output fundamental can be varied from 0.1 Hz to 1.5 kHz and the PWM switching can be set from 0.2 Hz to 100 MHz. The simulation and experimental results are presented.