By Topic

Light Effect on Negative Bias-Induced Instability of HfInZnO Amorphous Oxide Thin-Film Transistor

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

8 Author(s)
Dae Woong Kwon ; Seoul Nat. Univ., Seoul, South Korea ; Jang Hyun Kim ; Chang, Ji Soo ; Sang Wan Kim
more authors

For the first time, a comprehensive study is done regarding the stability under simultaneous application of light and gate dc bias in amorphous hafnium-indium-zinc-oxide (α-HIZO) thin-film transistors (TFTs). Subthreshold swing (SS) degradation, a negative threshold voltage (Vth) shift, and the occurrence of hump are observed in transfer curves after applying a negative gate bias and light stress. Based on the retention test at room temperature and the hysteresis analysis, it is revealed that all these phenomena result from hole trapping in the gate insulator. Moreover, it is proven that the SS degradation and hump occurrence are mainly attributed to hole trapping in SiO2 at the edge regions along the channel length/width directions and that a negative Vth shift is derived from hole trapping in the gate insulator far from the SiO2/HIZO interface.

Published in:

Electron Devices, IEEE Transactions on  (Volume:58 ,  Issue: 4 )