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Impact of static and dynamic stress on threshold voltage instability in high-k/metal gate n-channel metal-oxide-semiconductor field-effect transistors

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13 Author(s)
Dai, Chih-Hao ; Department of Photonics, National Sun Yat-Sen University, Kaohsiung 804, Taiwan ; Chang, Ting-Chang ; Chu, Ann-Kuo ; Kuo, Yuan-Jui
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This letter investigates the impact of static and dynamic stress on threshold voltage (Vth) instability in ultrathin n-channel metal-oxide-semiconductor field-effect transistors with hafnium-based gate stacks. Experimental results indicate Vth shift under dynamic stress is more serious than that under static stress due to charge trapping within the high-k dielectric. Capacitance-voltage techniques demonstrated that electron trapping under dynamic stress was located in the high-k dielectric near the source/drain overlap region rather than throughout the overall dielectric layer. This implies in real circuit operation, the phenomenon of electrons trapped in high-k near the source/drain overlap is the main issue affecting Vth instability.

Published in:

Applied Physics Letters  (Volume:98 ,  Issue: 9 )

Date of Publication:

Feb 2011

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