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A low-area filter bank design methodology for on-chip ADC testing

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4 Author(s)
Mechouk, N. ; IMS, Univ. of Bordeaux, Talence, France ; Dallet, D. ; Bossuet, L. ; Le Gal, B.

This paper focused on a filter bank study used for ADC BIST. Filter selection to separate spectral components of an analog-to-digital converted signal are discussed. Regarding the BIST context, a method to realize the lowest cost filter bank is proposed. This task has been done taking into account the wordlenght of the input and clock frequencies and the filter coefficient values.

Published in:

Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on

Date of Conference:

12-15 Dec. 2010