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A low-cost hardware architecture binarizer design for the H.264/AVC CABAC entropy coding

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3 Author(s)
del Mestre Martins, A.L. ; Inf. Inst., Fed. Univ. of Rio Grande do Sul, Porto Alegre, Brazil ; Rosa, V. ; Bampi, S.

This paper presents two hardware architectures design for the binarizer part of the CABAC (Context-Based Adaptive Binary Arithmetic Coding) entropy encoder as defined in the H.264/AVC video compression standard. The architectures proposed in this paper are able to reach the Level 4.2 processing requirements of the standard specification, achieving processing rates of 103,9 Mbins/s. The proposed solutions can save on average 50% hardware resources, mainly because a new technique to enable the reuse of hardware is applied, avoiding the support of the Kth order Exp-Golomb encoder.

Published in:

Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on

Date of Conference:

12-15 Dec. 2010