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Novel high speed and ultra low voltage CMOS flip-flops

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1 Author(s)
Berg, Y. ; Dept. of Inf., Univ. of Oslo, Oslo, Norway

In this paper we present novel ultra-low-voltage (ULV) CMOS flip-flops (FF). The FFs offer increased speed compared to conventional CMOS FF for ultra low supply voltages. ULV logic FFs can be operated at a clock frequency more than 10 times than the maximum clock frequency of more conventional CMOS FFs for ultra low supply voltages. The simulated data presented is obtained using the Spectre simulator provided by Cadence and valid for a 90 nm STM CMOS process. Monte Carlo simulations applying both mismatch and process variations are performed.

Published in:

Electronics, Circuits, and Systems (ICECS), 2010 17th IEEE International Conference on

Date of Conference:

12-15 Dec. 2010