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Analysis and Design of a Tapped-Inductor Buck–Boost PFC Rectifier With Low Bus Voltage

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2 Author(s)
Abramovitz, A. ; Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Irvine, CA, USA ; Smedley, K.M.

This paper presents a single-phase power factor corrector based on a tapped-inductor buck-boost converter. This paper suggests simplified models of the power stage under current-mode control and derives small-signal transfer functions of both the current and voltage control loops. Design rules for implementation of the proposed power factor corrector (PFC) are also suggested. The proposed PFC features low dc bus voltage, arbitrary lower than the peak line voltage. The proposed PFC is suitable for applications in computers and communications, where dc isolation can be provided by the downstream dc/dc converters. Simulation and experimental results are also reported and stand in good agreement with theoretical expectations.

Published in:

Power Electronics, IEEE Transactions on  (Volume:26 ,  Issue: 9 )