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Design of a DVP compatible bridge to randomly access pixels of high speed image sensors

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2 Author(s)

An efficient design of a digital-video-port (DVP) compatible bridge architecture to randomly access image pixels of a high speed image sensor is presented. FPGA synthesis results show that the bridge can support a data rate up to 215 MHz. The design is also synthesized using CMOS 0.18um technology.

Published in:

Consumer Electronics (ICCE), 2011 IEEE International Conference on

Date of Conference:

9-12 Jan. 2011