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Secure scan design using shift register equivalents against differential behavior attack

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3 Author(s)
Fujiwara, H. ; Grad. Sch. of Inf. Sci., Nara Inst. of Sci. & Technol., Nara, Japan ; Fujiwara, K. ; Tamamoto, H.

There is a need for an efficient design-for-testability to satisfy both testability and security of digital circuits. In our previous work, we reported a secure and testable scan design approach by using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers, and showed a security level by clarifying the cardinality of those classes of shift register equivalents (SR equivalents). However, SR equivalents are not always secure for scan-based side-channel attacks. In this paper, we consider a scan-based side-channel attack called differential-behavior attack and propose several classes of SR-equivalent scan circuits using dummy flip-flops in order to protect the scan-based differential-behavior attack. To show the security level of those extended scan circuits, we introduce differential-behavior equivalent relation, and clarify the number of SR-equivalent extended scan circuits, the number of differential-behavior equivalent classes and the cardinality of those equivalent classes.

Published in:

Design Automation Conference (ASP-DAC), 2011 16th Asia and South Pacific

Date of Conference:

25-28 Jan. 2011

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