By Topic

Feedforward Run-to-Run Control for Reduced Parametric Transistor Variation in CMOS Logic 0.13 \mu{\rm m} Technology

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Jedidi, N. ; Dept. of Electr. Eng., Univ. of Sherbrooke, Sherbrooke, QC, Canada ; Sallagoity, P. ; Roussy, A. ; Dauzere-Peres, S.

Targeting the physical gate critical dimension (CD) greatly impacts device performance. Unfortunately, advanced products within the CMOS logic 0.13 μm technology suffer from a large gate CD lot-to-lot variation, thereby causing an important device parametric characteristics variability. A novel technique is to develop a feedforward controller, which corrects for gate CD deviation by tuning the pocket implant dose. In order to enhance the controller robustness, a new scatterometry grating has been considered. The FFE-PI2 control system is simulated and then implemented in a 8" semiconductor device manufacture. Results indicate a 40% decrease in lot-to-lot variation of transistor performance.

Published in:

Semiconductor Manufacturing, IEEE Transactions on  (Volume:24 ,  Issue: 2 )