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A statistical parametric and probe yield analysis methodology [IC manufacture]

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1 Author(s)
A. Y. Wong ; KLA, Yield Manage. Co., USA

This paper describes a fast and effective parametric analysis methodology for identifying and quantifying parametric sensitivity of the product yield in a semiconductor process. Starting with over 100 parametric parameters typically, this parametric analysis methodology is able to isolate the top five parametric problems that have significant yield impact. It also able to translate the parametric problems to fab process module problems that can be fixed by fab process engineers. The proposed methodology separates the product yield into two major components: a non-random systematic yield Ys and a random yield Yr. It calculates statistics for all ET (Electrical Test) parameters and identifies the critical yield limited factors based on the analysis of the statistical significance of the data groups. The proposed methodology is capable of determining the yield impacts of the parametric sensitive parameters, and it is also capable of identifying the causes of the parametric yield losses. Based on the results of the parametric analyses, it will propose a detail plan to improve the systematic yield. Applications of the proposed parametric and probe yield analysis methodology to many manufacturing lines' data show great success in identifying and quantifying parametric yield sensitivity

Published in:

Defect and Fault Tolerance in VLSI Systems, 1996. Proceedings., 1996 IEEE International Symposium on

Date of Conference:

6-8 Nov 1996