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Trace Buffer-Based Silicon Debug with Lossless Compression

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3 Author(s)
Prabhakar, S. ; Dept. of Electr. & Comput. Eng., Virginia Tech, Blacksburg, VA, USA ; Sethuram, R. ; Hsiao, M.S.

The capacity of the available on-chip trace buffer is limited. To increase its capacity, we propose real-time compression of the trace data via novel source transformation functions, namely real-time difference vector computation, efficient interconnect network and real time alternate vector reversal that reduces the entropy of the trace data. The proposed compression technique is implemented on hardware and operates real-time to capture debug data. Experimental results for sequential benchmark circuits show that the proposed method gives better compression percentage compared to prior works. The area overhead of our trace compressor is up to 20X less compared to dictionary-based codes and yields up to 4X improvement in the compression ratio.

Published in:
VLSI Design (VLSI Design), 2011 24th International Conference on

Date of Conference: 2-7 Jan. 2011

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