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A new DRAM cell with a transistor on a lateral epitaxial silicon layer (TOLE cell)

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4 Author(s)
K. Terada ; NEC Corp., Shimokuzawa, Japan ; T. Ishijima ; T. Kubota ; M. Sakao

A new dynamic RAM (DRAM) cell structure and its fabrication technology are proposed. The proposed DRAM cell consists of a transistor on a lateral epitaxial silicon layer (TOLE) and a stacked capacitor formed in a trench. It can achieve high immunity to alpha-particle-induced noise and a low parasitic bit-line capacitance. The TOLE structure is produced by a silicon-on-insulator fabrication technology newly developed by combining epitaxial lateral overgrowth and preferential polishing. Reasonable electrical characteristics for the TOLE and high immunity against alpha-particle disturbance for the TOLE cell were confirmed

Published in:

IEEE Transactions on Electron Devices  (Volume:37 ,  Issue: 9 )