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Proposed is a new area-efficient truncated inversionless Berlekamp-Massey (TiBM) architecture for the Reed-Solomon (RS) decoder. The area-efficient feature of the proposed architecture is obtained by truncating redundant processing elements in the key equation solver (KES) block using the BM algorithm. This increases the hardware utilisation of the processing elements used to solve the key equation and reduces the hardware complexity of the KES block. The proposed TiBM architecture has the lowest hardware complexity compared with conventional KES architectures.