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A low-cost, leakage-insensitive semi-digital PLL with linear phase detection and FIR-embedded digital frequency acquisition

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7 Author(s)
Rui He ; Institute of Microelectronics, Tsinghua University, Beijing, China ; Chengwen Liu ; Xueyi Yu ; Woogeun Rhee
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A semi-digital PLL utilizing a hybrid DCO is presented. A mixed-mode loop control with an analog proportional path and a digital integration path provides linear phase tracking, leakage-insensitive loop filtering, and technology scalability. With the absence of the linear TDC, the semi-digital PLL with the hybrid DCO can relax design difficulties such as achieving low power or requiring an advanced CMOS technology. Also, the hybrid finite-impulse response (FIR) filtering method is employed to reduce the DCO quantization noise without causing latency. The prototype PLL implemented in 0.18 μm has the active area of 0.6 mm2 where only 0.01 mm2 is occupied by the analog loop filter.

Published in:

Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian

Date of Conference:

8-10 Nov. 2010