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JiST/SWANS is a wireless network simulator gaining increasing popularity for ad-hoc wireless, wireless sensor network, and vehicular network evaluations. Typical published results using this tool show node counts on the order of hundreds of nodes. However, realistic sensor and vehicular networks may contain many more nodes than that. One reason for this discrepancy is the computational cost of evaluation via simulation. Currently, cluster computers are becoming preferred over expensive multi-processor supercomputers for improving computational output. We present the design and implementation of a parallelization of JiST, the discrete event simulator core of JiST/SWANS. JiST uses unique dynamic byte-code rewriting to simplify the development of applications and has been shown to perform well running small- or medium-scale wireless network simulations on single processor systems. We propose an optimistic cluster-based architecture and apply it to JiST. Simulation entity memory is distributed evenly across all nodes in the cluster, resulting in linear memory growth. Details of the simulation engine including the complex event execution synchronization are hidden entirely from the application, easing development and debug time. Since JiST is the simulation backend of the SWANS wireless network simulator, this result is the first step in simulating large networks using SWANS in reasonable periods of time. Results presented show the performance of our parallelization of JiST is in line with the performance of other existing parallel discrete event simulators.