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A Compact W-Band CMOS Power Amplifier With Gain Boosting and Short-Circuited Stub Matching for High Power and High Efficiency Operation

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2 Author(s)
Chan, D.A. ; Dept. of Electr. & Comput. Eng., Univ. of Illinois Urbana-Champaign, Urbana, IL, USA ; Milton Feng

Using cascode cell, inductance gain boosting and source degeneration techniques in 90 nm CMOS process, a two-stage power amplifier operating at 80 GHz with a minimum chip area of 0.35 mm2 demonstrates gain of 18 dB, linear output power of 10.8 dBm, saturated power of 13.3 dBm, and PAE greater than 11.8% when the amplifier is biased at Vd = 3 V and Vg = 1 V.

Published in:

Microwave and Wireless Components Letters, IEEE  (Volume:21 ,  Issue: 2 )