Referenced Items are not available for this document.
A layout technique that exploits single-event transient pulse quenching to mitigate transients in combinational logic is presented. TCAD simulations show as much as 60% reduction in sensitive area and 70% reduction in pulse width for some logic cells.
Published in:
Nuclear Science, IEEE Transactions on
(Volume:58
,
Issue:
3
)
Date of Publication: June 2011
- Page(s):
- 885 - 890
- ISSN :
- 0018-9499
- INSPEC Accession Number:
- 12049161
- Digital Object Identifier :
- 10.1109/TNS.2010.2097278
- Product Type:
- Journals & Magazines
- Date of Publication :
- 04 February 2011
- Date of Current Version :
- 13 June 2011
- Issue Date :
- June 2011
- Sponsored by :
- IEEE Nuclear and Plasma Sciences Society
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