By Topic

Layout Technique for Single-Event Transient Mitigation via Pulse Quenching

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

6 Author(s)
Atkinson, N.M. ; Vanderbilt Univ., Nashville, TN, USA ; Witulski, A.F. ; Holman, W.T. ; Ahlbin, J.R.
more authors

A layout technique that exploits single-event transient pulse quenching to mitigate transients in combinational logic is presented. TCAD simulations show as much as 60% reduction in sensitive area and 70% reduction in pulse width for some logic cells.

Published in:

Nuclear Science, IEEE Transactions on  (Volume:58 ,  Issue: 3 )