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Quantum mechanical analytical modeling for calculating the drain current of FinFET devices has been proposed in this paper. The work is presented for a FinFET structure with channel length of 30 nm, Fin height of 30 nm and Fin thickness of 20 nm. The variation of drain current with applied drain voltage and gate voltage for varying channel lengths and Fin thicknesses has also been evaluated. Our analytical modeling results were compared and contrasted with the reported experimental results in order to verify our proposed model. A close match was found which validates our analytical approach. The drain current has, also been, evaluated using the Synopsys TCAD tool Sentaurus and compared with the results obtained through our QM model.