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For the first time, we demonstrate low-VT (VTlin ±0.32V) nMOS and pMOS adjusted in a gate first FDSOI technology by work-function engineering of TiN/TaAlN metal gates. Especially, for low-VT pMOS, various Chemical-Vapor-Deposited TaAlN stacks with optimized Al concentration have been studied to finely tune the work-function above midgap while maintaining good reliability and mobility. Short channel performance of 500μA/μm ION and 245μA/μm IEFF at 2nA/μm IOFF and VDD=0.9 V is reported on pMOS with a TaAlN gate. In addition, it is found that the combination of these two metal gates with either n- or p-doped ground planes below the Ultra-Thin Buried Oxide (BOX) can offer 4 different VT from 0.32 V to 0.6 V for both nMOS and pMOS, demonstrating a real multiple-VT capability for FDSOI CMOS while keeping the channel undoped and the VT variability around AVT=1.3mV.μm.