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From the future Si technology perspective: Challenges and opportunities

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1 Author(s)
Kim, Kinam ; SAIT, Samsung Electron. Co., Yongin, South Korea

As silicon technology enters sub-20nm nodes, new materials, structures and processes are being introduced in order to continue with the advantages of dimensional scaling, e.g, 3D NAND, ReRAM, EUVL, etc. Beyond 10 nm, Si CMOS technology will remain as the mainstream. In this paper, key drivers for silicon-based nano-electronics as well as research directions will be reviewed from viewpoints of system, memory, logic and emerging Si technologies.

Published in:

Electron Devices Meeting (IEDM), 2010 IEEE International

Date of Conference:

6-8 Dec. 2010

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